The present invention relates to complementary logic field effect transistors, and more particularly to such transistors made from germanium and gallium arsenide.
Complementary pair (p-channel, n-channel) metal-oxide-silicon (CMOS) field effect transistors were developed in the late 1960's and represent a large fraction of the total semiconductor market today. Their basic attribute is that logic cells and memory cells fabricated in CMOS technology consume negligible power except during the switching process. Their greatest drawback is that they are comparatively slow. The slow speed accrues from the relatively low mobility of charge carriers in silicon. To operate at subnanosecond speeds requires that they be fabricated with exceedingly small dimensions to minimize the transit time of charge carriers across the channel. A further disadvantage of CMOS technology derives from the disparity between hole mobility and electron mobility in silicon. This generally requires the p-channel device to be about four times larger than the n-channel device. Thus, additional speed can be obtained in CMOS logic devices only by the expensive yield-reducing process of shrinking size to submicrometer dimensions.
Recently a high speed, moderate-power logic technology has been developed based on a technology given various names to describe the principle employed. Among these names are high electron mobility transistor (HEMT), two dimensional electron gas (2 DEG) transistor, selectively-doped heterojunction transistor (SDHT), modulation-doped transistor (MODFET), and others. Their principle of operation depends on a heterojunction wherein a high bandgap semiconductor layer, e.g., GaAlAs, is grown over an unintentionally-doped lower bandgap material, e.g., GaAs. Ionized impurities purposefully placed in the higher bandgap semiconductor overlayer lose their electrons to the upper region of the lower bandgap material thereby forming a pseudo two dimensional electron gas (2 DEG). Since the region of the 2 DEG contains only residual background impurities in concentrations of but 5.times.10.sup.14 parts per cubic centimeter, there exists comparatively little impurity scattering thereby providing a much higher electron mobility than would otherwise exist for a given concentration of electrons in conventional structures. These devices have exhibited switching speeds as fast as 12 picoseconds and represent the very fastest of semiconductor logic technology today.
The biggest limitation of these devices is that their complement, a high hole mobility transistor, does not exist. Complementary logic is therefore not feasible at the present time. Attempts to circumvent this limitation are to use a combination of normally-ON and normally-OFF devices on the same chip. This requires rather extreme dimensional control and practical yields remain to be seen and even when achieved, power dissipation exceeds that which would result from a true complementary high mobility transistor logic device. Thus, HEMT technology has speed advantages, but consumes much more power than does CMOS technology.
Further, with regard to these devices, the GaAs/GaAlAs heterojunction interface has made possible the High Electron Mobility Transistor (HEMT). This device has exhibited record-breaking millimeter wave noise figures, fastest semiconductor logic speeds, and lowest power semiconductor logic. Even with this performance, it has not entirely lived up to expectations. The reasons for the shortcomings are primarily threefold. Firstly, it has only recently been shown that the effective heterojunction energy discontinuity in the GaAs/GaAlAs interface is much lower than originally thought. This is because the donors in the GaAlAs go deep at large mole fractions of aluminum, and in fact they go so deep that the energy level of the donors is only 100 mev above that of the GaAs material into which they transfer. Thus the large effects originally expected do not accrue. Secondly, the electrons, once they have transferred to the two dimensional electron gas in the underlying GaAs, are scattered by polar phonon scattering. The final third limitation is that the complementary two dimensional HOLE gas in GaAs suffers from a heavy mass and has such a low saturated velocity that it is impractical.
The GaAs/GaInAs heterojunction overcomes the first problem of the GaAlAs/GaAs interface in that the full heterojunction energy can be realized. It does, however, create another problem, that of alloy scattering. Even though the effective electron mass in GaInAs is even lighter than in GaAs and a greater heterojunction discontinuity can be realized, the alloy scattering problem of electrons in GaInAs seriously limits performance to the extent that little is gained. In addition, a lattice mismatch problem exists which puts reliability into question. The polar phonon problem and the lack of a complementary HOLE device are also found in the GaAs/GaInAs device.
Germanium lies adjacent to and between the elements gallium and arsenic in the atomic table. The lattice constant of Ge is within a fraction of 1% of that of GaAs. By adding 1% indium to GaAs, Ge can be perfectly lattice-matched to the indium doped GaAs.
The HOLE mobility in germanium at room temperature exceeds that of the electron mobility of silicon at room temperature, and at cryogenic temperatures approaches 100,000. The ELECTRON mobility of germanium at room temperature significantly exceeds that of silicon, and at cryogenic temperatures approaches 1,000,000. Charge carriers (electrons and holes) of germanium do not "freeze out" at very low temperatures as they do in silicon or gallium arsenide.
Germanium is now the purest of all semiconductors. Refined over the past five years for ultra violet detector work, Ge can now be routinely obtained with total background impurity concentrations of 1.times.10.sup.10 /cm.sup.3 as compared to 1.times.10.sup.12 /cm.sup.3 in silicon and 5.times.10.sup.13 /cm.sup.3 in GaAs.
In the mid 1970's research in silicon solid state epitaxy led to better processing of ion-implanted silicon devices and better MOS structures. However, prior to the concentration on silicon solid state epitaxy it was demonstrated that solid state epitaxy in germanium at low temperatures can be accomplished. It has recently been reported that germanium can be grown which exhibits low temperature electron mobilities approaching 1,000,000 and hole mobilities approaching 100,000. Not only are the germanium mobilities high, but the saturated velocity is also very high.
Additionally, research recently has shown that materials can now be deposited in high quality on a substrate at low temperature by using a shielded plasma source to "pyrolize" the reactant-bearing gas(es) thus permitting the substrate temperature to be independently controlled without consideration for the substrate being kept at a temperature high enough to pyrolize the reactant-bearing gas. The substrate can thus be kept at a much lower temperature without adversely effecting the deposited film morphology or structure. Thus, interdiffusion between the substrate and the deposited film becomes negligible. Additionally, recently reported work uses ion cluster beam technology to deposit GaAs onto Ge at low temperature without interdiffusion and resulting autodoping.
In the mid 1960's silicon won a decisive competition with germanium. At that time there were two uncontested attributes of silicon which set the course of materials development for the next two decades. The first was that silicon had a native insulator and germanium did not. The second was that silicon had a higher bandgap than germanium and if high operation temperature is encountered, the larger bandgap is favored. In 1983 several changes have happened which re-open the competition. First among these was the announcement that insulators could be subcutaneously grown in germanium by ion implantation. By significantly reducing the oxygen content of reactant ammonia gases, the native germanium nitride insulator has been demonstrated to reproducibly ensure the inversion of the germanium surface. Shielded plasma depositions of SiO.sub.2 /Si.sub.3 N.sub.4 composite insulating layers have also been reproducibly shown to affect inversion in a stable manner. The germanium equivalent of the CMOS technology thus becomes viable.
The highest speed silicon logic being considered today is that of cooled CMOS. In contrast to silicon where cooling by liquid nitrogen has small but significant advantages, cooling germanium creates very large improvements in both hole and electron mobility and in saturated carrier velocities. Whereas charge carriers in silicon begin to freeze out at lower temperatures, there is no measurable freeze out of charge carriers in germanium at temperatures as low as those needed for superconducting metallization.
Heteroepitaxial growth of germanium on gallium arsenide and vice versa has been demonstrated by several investigators and is well-known. Successful growth is most commonly achieved by the molecular beam epitaxy (MBE) process in a high vacuum and at temperatures exceeding 580.degree. C. Unfortunately, arsenic from the underlying GaAs diffuses into the growing germanium film causing the germanium to contain large concentrations of arsenic and measurable concentrations of arsenic to a depth of 2.mu.m into the germanium. Obviously this is not suitable for use as a HEMT structure.
A process known as solid phase epitaxy was developed during the mid 1970's. Virtually all demonstrations were with silicon although GaAs was also shown to be amenable to the process. Simply stated, amorphous (not polycrystalline) silicon is deposited onto a single crystalline silicon substrate. The substrate and amorphous film are then both heated to 550.degree. C. or higher and the amorphous layer regrows epitaxially into a single crystal film. Although the technology has not been extensively used, the work conclusively demonstrated that elemental semiconductors could be changed from their amorphous state to a single crystalline state. More importantly however, the temperature at which the epitaxial growth occurs can be substantially lower (hundreds of degrees) than that required for conventional epitaxial growth.
During the past years much knowledge has been gained regarding plasma-assisted deposition of films. Pertinent aspects of these advances can be summarized as follows: (1) charged ions must be avoided at the growth surface, (2) the growing surface must not be in the line-of-sight to the plasma flow, (3) path length must be sufficiently short so as to prevent molecular recombination of reactant ions and (4) flow rate must be accurately controllable.
The mobility of charges in a semiconductor is expressed by e .tau./m. For germanium m is three times larger than for GaAs. The purity of undoped germanium is, however, as much as 5000 times better than that of the best of GaAs. Thus the scattering time .tau. of undoped germanium is conservatively 100 times longer than that in GaAs. The effective mobility in a two dimensional electron gas state can thus be much higher than it is in GaAs. Since there is no polar scattering in germanium as there is in GaAs, the charge carriers (e.g., electrons or holes) can theoretically gain much more energy (speed) than is possible in GaAs. Thus the saturated velocity will be considerably higher. Since donors do not go as deep (energy-wise) in GaAs as they do in GaAlAs, the GaAs can be used as the supplier of electrons for the two dimensional electron gas in germanium. Thus, the realizable heterojunction offset is much greater in the GaAs/Ge interface than it is in the GaAlAs/GaAs interface. Since there is no polar scattering in germanium, the performance of a GaAs/Ge HEMT would be considerably greater than that of a GaAlAs/GaAs HEMT device.
In addition to the superior HEMT technology created by the GaAs/Ge interface, a High Hole Mobility Transistor (HHMT) is also possible as the holes in Ge are considerably lighter than are holes in GaAs. In semiconductors which holes are derived from ionized acceptor impurities, the hole mobility of germanium is typicallly 6 to 7 times that of GaAs. In a two dimensional hole gas device it would be even higher.
The use of the GaAs/Ge interface thus offers the potential of creating a complementary p-channel/n-channel logic technology whose operating speed cannot be matched by any other semiconductor technology. Switching speeds of less that 5 picoseconds with power-delay products of 250 attojoules can be projected.
Since the charge carriers in this HMT technology do not freeze out as the temperature is lowered, operation can also be envisioned at temperatures wherein superconducting transmission lines are possible thereby eliminating dispersion and cross-talk problems encountered by conventional dense semiconductor technology. Thus 3-terminal logic devices may be used at speeds and power dissipation nearly equal to that projected for Josephson junction technology.
Metallization losses can be substantially reduced by cooling to a temperature of 40.degree. K. At this temperature more conventional semiconductors experience carrier freezeout and can not exploit the substantially increased conductivity of aluminum whereas GaAs/Ge technology can effectively exploit this temperature where closed cycle cryocoolers are efficient.
Accordingly, it is desirable to provide high mobility transistors using germanium/gallium arsenide for providing complementary logic field effect transistors.
Accordingly, it is an object of the present invention to provide germanium/gallium arsenide complementary logic field effect transistors which can operate at ultra high mobilities and do not deteriorate at low temperatures and a method for making said transistors.
Another object of the present invention is to provide germanium/gallium arsenide complementary logic field effect transistors wherein the construction of the field effect transistor is accomplished wherein the germanium and gallium arsenide do not impurity dope each other or out-diffuse into the other material.
Further objects and advantages of the present invention will become apparent as the following description proceeds and features of novelty characterizing the invention will be pointed out with particularity in the claims annexed to and forming a part of this specification.